"Correct Answer - Option 2 : 165
The correct answer is ""option 2"".
CONCEPT:
A pipeline is a process where multiple instructions get overlapped during execution.
The pipeline is divided into stages and these stages are connected with one another to improve the execution process
The pipeline allows storing and executing instructions in an orderly process.
In the instruction pipeline, a stream of instructions is executed by overlapping phases of the instruction cycle like fetch, decode, execute, etc.
It reads an instruction from memory while previous instruction being executed in others segments of the pipeline.
EXPLANATION:
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T1
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T2
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T3
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T4
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T5
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T6
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T7
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T8
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T9
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T10
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T11
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T12
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T13
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T14
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T15
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I1
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FI
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DI
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FO
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EI
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WO
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I2
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FI
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DI
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FO
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EI
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WO
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I3
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FI
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DI
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FO
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EI
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WO
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I4
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FI
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DI
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FO
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EI
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WO
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I5
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Stall
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I6
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stall
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I7
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stall
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I9
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FI
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DI
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FO
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EI
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WO
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I10
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FI
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DI
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FO
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EI
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WO
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I11
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FI
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DI
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FO
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EI
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WO
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I12
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FI
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DI
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FO
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EI
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WO
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Cycle time = max of all stages delay + buffer delay
= max (5ns,7ns,10ns,8ns,6ns) + 1ns
= 10ns + 1ns
= 11ns
Out of all the instructions from I1 to I12, I4 is the only branch instruction.
When I4 takes branch, the control will jump to the target instruction I9.
There will be 3 stalls in stages DI, FO & EI.
So after 3 stalls, I9 will start its execution as it is a branch target.
So, total number of clock cycles = 15
Since 1 clock cycle time = 11ns
So, total time to complete the program = 15 × 11ns = 165 ns
Hence, the correct answer is ""option 2"".
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