Question

Statement (I):  Digital ramp converter is the slowest ADC.

Statement (II)): It requires N² clock pulses for conversion.

Codes:

1. Both Statement (I) and Statement (II) are individually true and Statement (II) is the correct explanation of Statement (I).
2. Both Statement (I) and Statement (II) are individually true and Statement (II) is not the correct explanation of Statement (I).
3. Statement (I) is true but Statement (II) is false.
4. Statement (I) is false but Statement (II) is true.

Answer 1

Correct Answer - Option 3 : Statement (I) is true but Statement (II) is false.

For n-bit conversion, the conversion time for different ADC are:

Counter type ADC: (2n – 1) Tclk

Successive approx. time ADC: n Tclk

Flash type ADC: Tclk

Dual slope ADC: (2n+1 – 1) Tclk