The size of a memory register is given by \({\rm{M}} \times {\rm{N}}\) where \({\rm{M}}\) is the number of rows and \({\rm{N}}\) is the number of columns. Now, the given memory array is in the size of a square, i.e, the number of rows is equal to the number of columns. Thus, \({\rm{M}} = {\rm{N}}\). So, we have \({{\rm{M}}^2} = 16384\).
\(\Rightarrow {\rm{M}} = 128\)
Now, the rows are fetched by the address lines and all the registers of a particular row are handled by data lines. Now, for a register with 128 flip flops can be handled by
\({\log _2}128 = 7\) data lines. Similarly, the number of address lines required by the row decoder is also 7.
