In the circuit shown in the figure, there are two parallel plate capacitors each of capacitance C. The switch `S_1` is pressed first to fully charge the capacitor `C_1` and then released. The switch `S_2` is then pressed to charge the capacitor `C_2`. After some time, `S_2` is released and then `S_3` is pressed. After some time
A. the charge on the upper plate of `C_(1)` is 2C`V_(0)`
B. the charge on the upper plate of `C_(1)` is `CV_(0)`
C. the charge on the upper plate of `C_(2) ` is 0
D. the charge on the upper plate of `C_(2)` is -C`V_(0)`