Consider n channel JFET with gate to source voltage VGG and drain to source voltage VGG. When VGG is zero, drain current is maximum and flows from drain to source called as Lcc. When VOG is increased, reverse bias across junction increases and width of depletion region across the junctions increases. Due to this channel width decreases and hence the drain current decreases. Thus the reverse voltage applied across gate to source terminal controls the drain current. When the gate to source voltage is further increased, a stage will be reached at which two depletion regions touch each other and the drain current becomes zero. Pinch off voltage is the gate voltage at which drain current becomes zero.