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With a logic circuit, explain working of unlocked SR flip flop built using NAND gates. Draw its timing diagram and truth table.

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It is constructed using inverters inserted into inputs of cross coupled NAND gates.
Working:

1. When S = 0, R = 0, it does not respond and hence outputs Q and Q will remain in their previous state. This is called HOLD condition.

2. When S = 1 and R = 0, the output Q and Q change to 1 and 0. This condition is called SET state.

3. When S = 0, R = 1, the output Q and Q change to 0 and 1. This condition is called RESET state.

4. When S = 1 and R = 1, it drives output Q and Q both to HIGH which is FORBIDDEN or INVALID condition.

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