Use app×
Join Bloom Tuition
One on One Online Tuition
JEE MAIN 2025 Foundation Course
NEET 2025 Foundation Course
CLASS 12 FOUNDATION COURSE
CLASS 10 FOUNDATION COURSE
CLASS 9 FOUNDATION COURSE
CLASS 8 FOUNDATION COURSE
0 votes
8.2k views
in Electronics by (52.4k points)

Explain the working of clocked Jk flip flop with its logic diagram truth table and timing

1 Answer

+1 vote
by (53.2k points)
selected by
 
Best answer

1. When J = 0, K = 0, the S and R inputs are both at 0 and hence the output is in the HOLD state.

2. When J = 0, K = 1, S input is at 0 while R can be either at 0 or 1, but output is always in the RESET state.

3. When J = 1, K = 0, S input can be 0 or 1 but R input is always at logic 0 and hence the output remains at a stable SET state.

4. When J = 1, K = 1 the Flip flop goes to complementary state of previous output i.e, flip flop toggles.

Welcome to Sarthaks eConnect: A unique platform where students can interact with teachers/experts/students to get solutions to their queries. Students (upto class 10+2) preparing for All Government Exams, CBSE Board Exam, ICSE Board Exam, State Board Exam, JEE (Mains+Advance) and NEET can ask questions from any subject and get quick answers by subject teachers/ experts/mentors/students.

Categories

...